{"id":947,"date":"2022-08-25T02:02:14","date_gmt":"2022-08-25T02:02:14","guid":{"rendered":"http:\/\/www.recologypower.com:9080\/?p=947"},"modified":"2022-08-25T02:02:15","modified_gmt":"2022-08-25T02:02:15","slug":"%e3%80%90nxp%e3%80%911588_dts_setting","status":"publish","type":"post","link":"http:\/\/www.recologypower.com:9080\/?p=947","title":{"rendered":"\u3010NXP\u30111588_dts_setting"},"content":{"rendered":"\n<pre class=\"wp-block-code\"><code>1588 setting following information:\n*******************************************\n1) For the constant pulse width of the PPS signal, you must set the Fiper value that satisfies the equation given in LS1046ADPAARM (page 1254).\n2) To get a pulse at every 1 second, the value written in Fiper register + TMR_CTRL&#91;TCLK_PERIOD] must equal 1000,000,000.\ne.g. given the two examples of different pulse width:\n\nCase 1:\n    -Clock_IN = 125MHz\n    -Nominal_clock = 100MHz\n    -Frequency Div Ratio = Clock_IN\/Nominal_clock = 125\/100 = 1.25\n    -Addenden = (2^32)\/1.25 = 3,435,973,836 = 0xCCCCCCCC\n    -TCLK_PERIOD should be equal to reciprocal of frequency of \u201cnominal clock\u201d and is recommended to have TCLK_PERIOD as integral factor of 10^9 = 10^9 \/ Nominal clock = 10^9 \/ 100*10^6 = 10 = 0xA\n    -Prescalar = 1000\n    -Output_Clock = 100MHz\/1000 = 0.1MHz = 100KHz\n    -Fiper value = tmr_prsc * tclk_period * N - tclk_period, where N is an integer more than 2\n                 = 1000 * 10 * 100000 - 10\n                 = 999,999,990\n                 = 0x3B9AC9F6\n                \n    In this case, you will see pulse with width of 1\/100KHz = 0.01 ms every 1 second\n   \nCase 2:\n    -Clock_IN = 125MHz\n    -Nominal_clock = 100MHz\n    -Frequency Div Ratio = Clock_IN\/Nominal_clock = 125\/100 = 1.25\n    -Addenden = (2^32)\/1.25 = 3,435,973,836 = 0xCCCCCCCC\n    -TCLK_PERIOD should be equal to reciprocal of frequency of \u201cnominal clock\u201d and is recommended to have TCLK_PERIOD as integral factor of 10^9 = 10^9 \/ Nominal clock = 10^9 \/ 100*10^6 = 10 = 0xA\n    -Prescalar = 10000\n    -Output_Clock = 100MHz\/10000 = 0.01MHz = 10KHz\n    -Fiper value = tmr_prsc * tclk_period * N - tclk_period, where N is an integer more than 2\n                 = 10000 * 10 * 10000 - 10\n                 = 999,999,990\n                 = 0x3B9AC9F6\n                \n    In this case, you will see pulse with width of 1\/10KHz = 0.1 ms every 1 second\n\n\n-examples: dpaa2 \n\nTimerOsc     = 125 MHz\ntclk_period  = 10 nanoseconds\nNominalFreq  = 1000 \/ 10 = 100 MHz\nFreqDivRatio = TimerOsc \/ NominalFreq = 125 \/ 100 = 1.25    (must be greater that 1.0)\ntmr_add      = ceil(2^32 \/ FreqDivRatio) = ceil(2^32 \/ 1.25) = 3,435,973,837 = 0xcccccccd\nOutputClock  = NominalFreq \/ tmr_prsc = 100 \/ 10000 = 0.01 MHz\nPulseWidth   = 1 \/ OutputClock = 1 \/ 0.01= 100 microseconds  (attention:The 1pps pulse width is related to the 1588 output clock frequency.)\nFiperFreq1   = desired frequency in Hz = 1 Hz\nFiperDiv1    = 1000000 * OutputClock \/ FiperFreq1 = 1000000 * 0.01 \/ 1 = 10000\n(1) tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period = 10000 * 10 * 10000 - 10 = 999,999,990\nFiperFreq2   = desired frequency in Hz = 100 Hz\nFiperDiv2    = 1000000 * OutputClock \/ FiperFreq2 = 1000000 * 0.01 \/ 100 = 100\ntmr_fiper2   = tmr_prsc * tclk_period * FiperDiv2 - tclk_period = 10000 * 10 * 100 - 10 = 9,999,990\nmax_adj      = 1000000000 * (FreqDivRatio - 1.0) - 1 = 1000000000 * (1.25 - 1.0) - 1 = 249,999,999\n\n soc {\n\t\t    ptp-timer@8b95000 {\n\t\t\tcompatible = \"fsl,dpaa2-ptp\";\n\t\t\treg = &lt;0x0 0x8b95000 0x0 0x100>;\n\t\t\tclocks = &lt;&amp;clockgen 4 1>;\n\t\t\tlittle-endian;\n\t\t\tfsl,extts-fifo;\n\t\t\tfsl,cksel       = &lt;0>;\n\t\t\tfsl,tclk-period = &lt;10>;\n\t\t\tfsl,tmr-prsc    = &lt;10000>;\n\t\t\tfsl,tmr-add     = &lt;0xcccccccd>;\n\t\t\tfsl,tmr-fiper1  = &lt;999999990>;\n\t\t\tfsl,tmr-fiper2  = &lt;9999990>;\n\t\t\tfsl,tmr-fiper3  = &lt;499990>;\n\t\t\tfsl,max-adj     = &lt;249999999>;\n\t\t    };\n   };\n\nmore info: 8.7.7.4 PTP device tree node configuration LSDK user guide 2108 or ref dts in kernel\n:vim .\/Documentation\/devicetree\/bindings\/ptp\/ptp-qoriq.txt\n* Freescale QorIQ 1588 timer based PTP clock\n\nGeneral Properties:\n\n  - compatible   Should be \"fsl,etsec-ptp\" for eTSEC\n                 Should be \"fsl,fman-ptp-timer\" for DPAA FMan\n                 Should be \"fsl,dpaa2-ptp\" for DPAA2\n                 Should be \"fsl,enetc-ptp\" for ENETC\n  - reg          Offset and length of the register set for the device\n  - interrupts   There should be at least two interrupts. Some devices\n                 have as many as four PTP related interrupts.\n\nClock Properties:\n\n  - fsl,cksel        Timer reference clock source.\n  - fsl,tclk-period  Timer reference clock period in nanoseconds.\n  - fsl,tmr-prsc     Prescaler, divides the output clock.\n  - fsl,tmr-add      Frequency compensation value.\n  - fsl,tmr-fiper1   Fixed interval period pulse generator.\n  - fsl,tmr-fiper2   Fixed interval period pulse generator.\n  - fsl,tmr-fiper3   Fixed interval period pulse generator.\n                     Supported only on DPAA2 and ENETC hardware.\n  - fsl,max-adj      Maximum frequency adjustment in parts per billion.\n  - fsl,extts-fifo   The presence of this property indicates hardware\n                     support for the external trigger stamp FIFO.\n  - little-endian    The presence of this property indicates the 1588 timer\n                     IP block is little-endian mode. The default endian mode\n                     is big-endian.\n\n  These properties set the operational parameters for the PTP\n  clock. You must choose these carefully for the clock to work right.\n  Here is how to figure good values:\n\n  TimerOsc     = selected reference clock   MHz\n  tclk_period  = desired clock period       nanoseconds\n  NominalFreq  = 1000 \/ tclk_period         MHz\n  FreqDivRatio = TimerOsc \/ NominalFreq     (must be greater that 1.0)\n  tmr_add      = ceil(2^32 \/ FreqDivRatio)\n  OutputClock  = NominalFreq \/ tmr_prsc     MHz\n  PulseWidth   = 1 \/ OutputClock            microseconds\n  FiperFreq1   = desired frequency in Hz\n  FiperDiv1    = 1000000 * OutputClock \/ FiperFreq1\n  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period\n  max_adj      = 1000000000 * (FreqDivRatio - 1.0) - 1\n\n  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The\n  driver expects that tmr_fiper1 will be correctly set to produce a 1\n  Pulse Per Second (PPS) signal, since this will be offered to the PPS\n  subsystem to synchronize the Linux clock.\n\n  Reference clock source is determined by the value, which is holded\n  in CKSEL bits in TMR_CTRL register. \"fsl,cksel\" property keeps the\n  value, which will be directly written in those bits, that is why,\n  according to reference manual, the next clock sources can be used:\n\n  For eTSEC,\n  &lt;0> - external high precision timer reference clock (TSEC_TMR_CLK\n        input is used for this purpose);\n  &lt;1> - eTSEC system clock;\n  &lt;2> - eTSEC1 transmit clock;\n  &lt;3> - RTC clock input.\n\n  For DPAA FMan,\n  &lt;0> - external high precision timer reference clock (TMR_1588_CLK)\n  &lt;1> - MAC system clock (1\/2 FMan clock)\n  &lt;2> - reserved\n  &lt;3> - RTC clock oscillator\n\n  When this attribute is not used, the IEEE 1588 timer reference clock\n  will use the eTSEC system clock (for Gianfar) or the MAC system\n  clock (for DPAA).\n\nExample:\n\n        ptp_clock@24e00 {\n                compatible = \"fsl,etsec-ptp\";\n                reg = &lt;0x24E00 0xB0>;\n                interrupts = &lt;12 0x8 13 0x8>;\n                interrupt-parent = &lt; &amp;ipic >;\n                fsl,cksel       = &lt;1>;\n                fsl,tclk-period = &lt;10>;\n                fsl,tmr-prsc    = &lt;100>;\n                fsl,tmr-add     = &lt;0x999999A4>;\n                fsl,tmr-fiper1  = &lt;0x3B9AC9F6>;\n                fsl,tmr-fiper2  = &lt;0x00018696>;\n                fsl,max-adj     = &lt;659999998>;\n        };\n\nls1046\u53ef\u4ee5\u7f16\u8f91 vim .\/arch\/arm64\/boot\/dts\/freescale\/qoriq-fman3-0.dtsi\n\n 130 ptp_timer0: ptp-timer@1afe000 {\n 131     compatible = \"fsl,fman-ptp-timer\", \"fsl,fman-rtc\";\n 132     reg = &lt;0x0 0x1afe000 0x0 0x1000>;\n 133     interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;\n 134     clocks = &lt;&amp;clockgen 3 0>;\n 135     fsl,extts-fifo;\n 136 };\n\n\u589e\u52a0\u5c5e\u6027\u6839\u636e\u9700\u6c42\uff1a\ncksel           --- \u65f6\u949f\u9009\u62e9\u3002\u53c2\u8003\u4e0a\u6587\u3002\ntclk-period     --- \u60f3\u83b7\u53d6\u5468\u671f\uff0c\u5373\u4e00\u4e2acnt\u5bf9\u5e94\u5468\u671f \u5355\u4f4dns\uff0c\u51b3\u5b9a\u4e861588\u7684 nominalfreq\uff0cnominalfreq= 1000\/tclk-period\n\n\n+ fsl,cksel = &lt;0>;               \/* 125M external high precision timer reference clock,rdb board *\/\n+ fsl,tclk-period = &lt;10>;        \/* 10 ns nominalfreq = 1000\/10 = 100MHz *\/\n+ fsl,tmr-prsc = &lt;10000>;        \/* \u8f93\u5165\u65f6\u949f100MHz \u8f93\u51fa\u65f6\u949f= 100\/tmr-prsc=1\/100Mhz=10Khz,\u4e14\u51b3\u5b9a\u4e861pps\u7684\u8109\u5bbd\u662f1\/10Khz=0.1ms. \n+ fsl,tmr-add = &lt;0xCCCCCCCD>;    \/* ceil(2^32\/FreqDivRatio)=(4294967296\/(125M\/100M)) = 0xCCCCCCCD\n+ fsl,tmr-fiper1 = &lt;999999990>;  \/* tmr_prsc * tclk_period * FiperDiv1 - tclk_period = 10000*10*(10*1000Hz\/1Hz)-10 = 999,999,990 = 0x3B9AC9F6\n+ fsl,tmr-fiper2 = &lt;9999990>;    \/* FiperFreq2   = desired frequency in Hz = 100 Hz;FiperDiv2 = 1000000 * OutputClock \/ FiperFreq2 = 1000000 * 0.01 \/ 100 = 100;tmr_fiper2 = tmr_prsc * tclk_period * FiperDiv2 - tclk_period = 10000 * 10 * 100 - 10 = 9,999,990\n+ fsl,max-adj = &lt;>;     \/* 10^9 *(FreqDivRatio - 1.0)-1 = 1000000000 * (FreqDivRatio - 1.0) - 1 = 1000000000 * (1.25 - 1.0) - 1 = 249,999,999\n\n\n-fsl\uff0ccksel\u5b9a\u65f6\u5668\u53c2\u8003\u65f6\u949f\u6e90\u3002\n-fsl\uff0ctclk period Timer\u53c2\u8003\u65f6\u949f\u5468\u671f\uff08\u7eb3\u79d2\uff09\u3002\n-fsl\u3001tmr prsc\u9884\u5206\u9891\u5668\u5bf9\u8f93\u51fa\u65f6\u949f\u8fdb\u884c\u5206\u9891\u3002\n-fsl\u3001tmr\u589e\u52a0\u9891\u7387\u8865\u507f\u503c\u3002\n-fsl\uff0ctmr-fiper1\u56fa\u5b9a\u95f4\u9694\u5468\u671f\u8109\u51b2\u53d1\u751f\u5668\u3002\n-fsl\uff0ctmr-fiper2\u56fa\u5b9a\u95f4\u9694\u5468\u671f\u8109\u51b2\u53d1\u751f\u5668\u3002\n-fsl\uff0ctmr-fiper3\u56fa\u5b9a\u95f4\u9694\u5468\u671f\u8109\u51b2\u53d1\u751f\u5668\u3002\n\u4ec5\u5728DPAA2\u548cENEC\u786c\u4ef6\u4e0a\u53d7\u652f\u6301\u3002\n-fsl\uff0cmax adj\u6700\u5927\u9891\u7387\u8c03\u6574\uff0c\u5355\u4f4d\u4e3a\u5341\u4ebf\u5206\u4e4b\u4e00\u3002\n-fsl\uff0cextts fifo\u6b64\u5c5e\u6027\u7684\u5b58\u5728\u8868\u793a\u786c\u4ef6\u652f\u6301\u5916\u90e8\u89e6\u53d1\u6233FIFO\u3002\n-little endian\u6b64\u5c5e\u6027\u7684\u5b58\u5728\u8868\u793a1588\u8ba1\u65f6\u5668\nIP\u5757\u4e3a\u5c0f\u7aef\u6a21\u5f0f\u3002\u9ed8\u8ba4endian\u6a21\u5f0f\u662fbig endian\u3002\n<\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"<div class=\"slide-text-bg2\">\n<h3><\/h3>\n<\/div>\n<div class=\"flex-btn-div\"><a href=\"http:\/\/www.recologypower.com:9080\/?p=947\" class=\"btn1 flex-btn\">\u9605\u8bfb\u66f4\u591a<\/a><\/div>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[102],"tags":[],"_links":{"self":[{"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=\/wp\/v2\/posts\/947"}],"collection":[{"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=947"}],"version-history":[{"count":1,"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=\/wp\/v2\/posts\/947\/revisions"}],"predecessor-version":[{"id":948,"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=\/wp\/v2\/posts\/947\/revisions\/948"}],"wp:attachment":[{"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=947"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=947"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.recologypower.com:9080\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=947"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}